In recent years, demands for lowering power consumption of mobile equipment and wearable devices have been increasing as applications increase.
In response to this, a system, which operates in a sensing mode (low resolution imaging mode) that can withstand constant activation and performs simple recognition with lower power consumption, in addition to an imaging mode with higher power consumption, has been developed for a solid-state imaging apparatus such as a CMOS image sensor. Accordingly, power can be consumed only when necessary to perform imaging, enabling autonomous optimization of power.
Normally, the power consumption of a processor that controls various chips is high in the entire camera system. Therefore, in order to realize constant activation of the solid-state imaging apparatus in the sensing mode, it is important to perform autonomous operation and bring the processor to a halting state from a viewpoint of power consumption reduction. In this case, the solid-state imaging apparatus is demanded to perform self-running operation in a state where clock supply is stopped.
As a technology relating to the self-running operation, for example, Cited Document 1 discloses a circuit configuration that stops an external clock at arbitrary timing and generates an internal clock.